1. Field of the Invention
Embodiments of the invention relate to the field of substrate implantation and bonding. More particularly, the present invention relates to an apparatus and method for ion activation of substrates to facilitate bonding.
2. Discussion of Related Art
Ion implantation is a process used to dope ions into a work piece. One type of ion implantation is used to implant impurity ions during the manufacture of semiconductor substrates to obtain desired electrical device characteristics. As is well known in the art, silicon wafers have a crystalline structure wherein the intrinsic conductivity of the silicon is too low to be a useful electrical device. However, by doping a desired impurity into the crystal lattice a current carrier is formed. The material to be doped into the wafer is first ionized in an ion source. The ions are extracted from the ion source and accelerated to form an ion beam of prescribed energy which is directed at the surface of the wafer. The energetic ions in the beam penetrate into the bulk of the wafer and embed into the crystalline lattice of the semiconductor material to form a region of desired conductivity.
An ion implanter generally includes an ion source chamber which generates ions of a particular species, a series of beam line components to control the ion beam and a platen or chuck to support the wafer that receives the ion beam. These components are housed in a vacuum environment to prevent contamination and dispersion of the ion beam. The beam line components may include a series of electrodes to extract the ions from the source chamber, a mass analyzer configured with a particular magnetic field such that only the ions with a desired mass-to-charge ratio are able to travel through the analyzer, and a corrector magnet to provide a ribbon beam which is directed to a wafer orthogonally with respect to the ion beam to implant the ions into the wafer substrate. The ions lose energy when they collide with electrons and nuclei in the substrate and come to rest at a desired depth within the substrate based on the acceleration energy. The depth of implantation into the substrate is based on the ion implant energy and the mass of the ions generated in the source chamber. The ion beam may be distributed over the substrate by electrostatic or magnetic beam scanning, by substrate movement, or by a combination of beam scanning and substrate movement. The ion beam may be a spot beam or a ribbon beam having a long dimension and a short dimension. Typically, arsenic or phosphorus may be doped to form n-type regions in the wafer and boron, gallium or indium are doped to create p-type regions in the wafer.
Alternatively, a plasma doping process may also be used to dope a semiconductor wafer. A wafer to be doped is placed on an electrically-biased platen, which functions as a cathode and is located in a plasma doping module. An ionizable doping gas is introduced into the chamber and a voltage pulse is applied between the platen and an anode or the chamber walls causing formation of a plasma containing ions of the dopant gas. The plasma has a plasma sheath in the vicinity of the wafer. The applied pulse causes ions in the plasma to be accelerated across the plasma sheath and implanted into the wafer. The depth of implantation is related to the voltage applied between the wafer and the anode or the chamber walls. In this manner, very low implant energies can be achieved. Plasma doping systems are described, for example, in U.S. Pat. No. 5,354,381 issued Oct. 11, 1994 to Sheng; U.S. Pat. No. 6,020,592 issued Feb. 1, 2000 to Liebert, et al.; and U.S. Pat. No. 6,182,604 issued Feb. 6, 2001 to Goeckner, et al. In other types of plasma doping systems, a continuous plasma is produced, for example, by inductively-coupled RF power from an antenna located internal or external to the plasma doping chamber. The antenna is connected to an RF power supply. Voltage pulses are applied between the platen and the anode at particular intervals causing ions in the plasma to be accelerated toward the wafer.
Many semiconductor processes involve wafer bonding where different materials are unified to create new electronic devices that can not otherwise be fabricated using a single silicon wafer. Some common processes that rely on wafer bonding include, for example, silicon-on-insulator (SOI) fabrication and three-dimensional stacked chip fabrication. There are several different methods of manufacturing an SOI chip. One method forms an SOI structure in a layer transfer process in which a crystalline silicon wafer is bonded to the top of a silicon dioxide layer previously formed on another crystalline silicon wafer. Van der Waals forces cause the two wafers to adhere immediately, allowing a stronger bond to be formed by heating the wafers in an annealing step. The active semiconductor layer is then cleaved along a plane and the upper portion is removed to provide a suitably thin active semiconductor layer. Integrated circuits are then fabricated on this isolated silicone layer. SOI technology is used to reduce junction capacitance and parasitic leakage current to improve semiconductor device speeds.
In order to prepare the wafers to be bonded, the surfaces must be activated. One method of activation relies on treating the wafers with wet chemistries to create bonding forces and applying a subsequent annealing process at high temperatures (>900° C.) to strengthen the bond. Plasma activation is another process used to activate wafer surfaces for bonding. In this method, wafers are placed in a plasma chamber where they are exposed to plasmas (e.g. H2, O2, etc.) and, without breaking vacuum, the wafer surfaces are placed together and bonding occurs. By using plasma activation, the mobility of the ionic species on the surfaces of the wafer increases which increases the oxide reaction thereby enhancing the bonding process. In addition, plasma activation reduces the possibility for contamination as well as obviating the need for temperature annealing. However, plasma activation requires bonding of the substrate surfaces within a dedicated process device, such as, for example, a plasma chamber within a semiconductor cluster tool. A typical semiconductor cluster tool is comprised of several different wafer processing modules that may be managed by a centralized control system. Use of a separate process tool increases complexity and cost of wafer fabrication within a cluster tool as well as during the manufacturing process. Accordingly, there is a need in the art for an improved apparatus and method for wafer bonding activation.